The present invention relates to a method of correcting designed-pattern data obtained by data-processing a plurality of designed patterns, a method of electron beam exposure including the method of correcting designed-pattern data, a photomask, a method of fabrication of a photomask, a method of optical exposure, a semiconductor device, a method of fabrication of a semiconductor device, and an apparatus for correcting designed-pattern data.
A photomask used in the process of optical lithography for the fabrication of a semiconductor device has a structure in which a patterned light-shielding thin layer or light semi-shielding thin layer is formed on a substrate transparent to exposure light, such as a glass substrate. In the fabrication of the semiconductor device, it is required to transfer a pattern formed in the photomask to a photo resist formed, e.g., on a semiconductor substrate. For this purpose, it is required to produce data from a plurality of designed patterns designed by means of CAD or the like and expose an electron beam resist formed on a mask blank with an electron beam (electron beam exposure) on the basis of pattern data for electron beam exposure prepared from the produced data so that patterns corresponding to the designed patterns are faithfully formed in the electron beam resist. In some case hereinafter, patterns formed in a photomask will be referred to as xe2x80x9cmask patternsxe2x80x9d, pattern data obtained by data-processing a plurality of the designed patterns will be referred to as xe2x80x9cdesigned-pattern dataxe2x80x9d, pattern data for electron beam exposure will be referred to as xe2x80x9cpattern data for exposurexe2x80x9d, patterns formed in an electron beam resist will be referred to as xe2x80x9cresist patternsxe2x80x9d, and patterns formed in a photo resist will be referred to as xe2x80x9cprinted patternsxe2x80x9d. For example, the designed-pattern data for fabricating a photomask is constituted of a steam format called GDSII/Stream in which the designed patterns are represented by polygons or of an electron beam data format (xe2x80x9cEB data formatxe2x80x9d hereinafter) in which the designed patterns are represented by rectangles and trapezoids.
Meanwhile, in electron beam exposure, a phenomenon called xe2x80x9cproximity effectxe2x80x9d controls the limitation of resolution for forming mask patterns, and it is a big problem when a photomask requiring micro- or nano-processing is fabricated. The above proximity effect takes place by scattering of electrons in a solid, and it can be classified into two categories depending upon the shapes and/or geometrical layouts of the mask patterns to be formed. That is, it is classified into an intra proximity effect which takes place in an isolated small mask pattern and an inter proximity effect which takes place between adjacent mask patterns. In the intra proximity effect, electrons incident on an electron beam resist are scattered into portions of the electron beam resist other than portions of the electron beam resist where resist patterns are to be formed. As a result, accumulated energy in the portion of the electron beam resist where resist patterns are to be formed cannot reach a predetermined threshold value, so that the sizes of the resist patterns are smaller than those of their designed patterns, or that corner portions of the resist patterns are rounded to some extent. On the other hand, in the inter proximity effect, accumulated energy in resist patterns to be formed in an electron beam resist reaches a predetermined threshold value due to the scattering of electrons from resist pattern(s) close or adjacent thereto, and the resist patterns have larger dimensions than their designed patterns or, in the worst case, resist patterns are in contact with another. In the direct exposure of an electron beam resist formed on a semiconductor substrate with an electron beam, the proximity effect similarly causes the above problems.
For correcting the proximity effect with regard to an electron beam exposure apparatus according to a variable shaped beam method, there is proposed a method in which electron beam dosages (xe2x80x9cdosagexe2x80x9d, hereinafter) are varied depending upon each resist pattern to be formed in an electron beam resist. In the above method, evaluation points (indicated by black dots) are provided on edges of a designed pattern as schematically shown in FIG. 10A, accumulated energy determined on the basis of the EID (Exposure Intensity Distribution) function proposed by T. H. P. Chang, J. Vac. Soi. Technol. 12, 1271 (1983) is calculated with regard to each evaluation portion, and an optimum dosage for forming a resist pattern is determined. However, when geometrical layouts of adjacent designed patterns in the vicinity of the evaluation points differ, one obtained optimum dosage in one evaluation point differs from another obtained optimum dosage in another evaluation point, and eventually, a weighted mean dosage is inevitably determined to be an optimum dosage. Accuracy is therefore different from one evaluation point to another, or no desired accuracy is secured in some cases. For overcoming the above defect, it is required to divide a designed pattern as shown in FIG. 10B and control the dosage with regard to each evaluation point. Numerals in FIGS. 10A and 10B show the dosages. However, when all of designed patterns are divided to smaller sizes, the time required for calculation of the proximity effect correction increases, and the file size (data volume) of the designed-pattern data or the time required for electron beam exposure increases. The consequent problem is that the fabrication of a photomask takes a long time.
On the other hand, even if the proximity effect correction is carried out to form the mask patterns in order to accurately transfer the designed patterns to a photo resist, there is another problem that an optical proximity effect takes place when the mask patterns are transferred to a photo resist formed, e.g., on a semiconductor substrate by means of exposure light through the photomask, so that the shapes of the patterns formed in the photo resist (printed patterns) differ from those of their designed patterns. That is, the optical exposure process in the production process of a semiconductor device has the problem of an optical proximity effect. That is, when a mask pattern whose size approximates a wavelength of the exposure light is transferred to a photo resist, an interference phenomenon with the exposure light remarkably takes place, and a printed pattern differs from its designed pattern in size. The optical proximity effect results in phenomena in which a line width of an isolated line differs from a line width of a repetitive line and in which line-end shortening occurs, and it causes the deterioration of gate line width controllability or a decrease in an alignment margin. As a result, transistors vary in characteristics, and eventually, the yield of chip production decreases. The optical proximity effect has extremely detrimental effects on the efficiency of production of semiconductor devices. Since the above problem is fatal particularly to memory cells which have many repetitive patterns and are required to have high-degree integration, there has been developed an advanced automatic optical proximity effect correction (OPC) system on the basis of a light intensity simulation for memory cells which come after the generation of design rule 0.35 xcexcm.
The optical proximity effect is also classified into an intra optical proximity effect and an inter optical proximity effect. In the intra optical proximity effect, the exposure light diffracts in a mask pattern itself, and as a result, the dimensions of a pattern formed in a photo resist by focusing the exposure light on the photo resist differ from those of its designed pattern, or, for example, the short side and the long side of a rectangle differ to a great extent in formation accuracy. On the other hand, in the inter optical proximity effect, exposure light which diffracts from a mask pattern adjacent to some other mask pattern interferes with exposure light which passes through the other mask pattern, and as a result, the dimensions of the other pattern formed in the photo resist differ from those of its designed pattern.
Further, the optical proximity effect results in variation of the line widths of isolated lines or line-end shortening in memory peripheral circuit patterns or random circuit patterns in one chip of an ASIC semiconductor device. As a result, it causes a decrease in the yield of production due to an adverse influence on transistor characteristics or a decrease in an alignment margin. However, when the optical proximity effect correction is carried out on the random circuit patterns on a one-chip scale by means of the OPC system on the basis of a light intensity simulation, it requires an enormous amount of calculation time and affects a turn around time (TAT) from the designing of one chip to the fabrication of semiconductor devices. That is, the calculation of the optical proximity effect correction on a cell unit having a size of about several xcexcmxc3x97several xcexcm takes a time of about ten seconds, while the calculation of the optical proximity effect correction on one chip as a whole takes a time of hundreds of days.
For coping with the above problem, there is proposed a method in which the optical proximity effect correction is carried out on one-chip level by a rule-based method in which the corrections are made only on the designed patterns having shapes within a certain limit at a high speed on the basis of a predetermined rule. Please refer, for example, to xe2x80x9cAutomated Optical Proximity Correctionxe2x80x94a rule-based approachxe2x80x9d , O. W. Otto, et al., Proc. SPIE, Vol. 2197 (1994) pp. 274-290, or xe2x80x9cLarge Area Optical Proximity Correction with a Combination of Rule-Based and Simulation-Based Methodsxe2x80x9d, S. Miyama, et al., Jpn. J. Appl. Phys. Vol. 35(1996) pp. 6370-6773.
FIG. 11 shows an example of the flow of formation of the pattern data for exposure when the designed-pattern data is of a stream format. In this example, the designed-pattern data are bit-mapped, and then the optical proximity effect correction is carried out on the bit-mapped data to obtain the designed-pattern data corrected with regard to the optical proximity effect. The obtained designed-pattern data is of stream format, and the obtained designed-pattern data of the above format is converted to designed-pattern data of EB data format by a known method. And, the pattern data for exposure are prepared from the designed-pattern data of EB data format which are corrected with regard to the optical proximity effect. Bit-mapped data will be sometimes referred to as xe2x80x9cbitmap dataxe2x80x9d hereinafter.
FIG. 12A shows results of studies of an influence of the optical proximity effect by a light intensity simulation, depending upon the density of designed patterns. In FIG. 12A, an upper portion schematically shows the designed patterns, and a lower portion schematically shows the printed patterns. FIG. 12B shows results after the optical proximity effect correction is carried out. In FIG. 12B, an upper portion schematically shows the designed patterns after the optical proximity effect correction, and a lower portion schematically shows the printed patterns. FIGS. 12A and 12B show that the variation of the line widths between the isolated line and the dense line is decreased by carrying out the optical proximity effect correction.
Meanwhile, for the above-explained proximity effect correction or optical proximity effect correction, it is required to determine the optimum dosages for the designed patterns or correct the shapes of the designed if patterns. More specifically, when the pattern data for exposure is prepared from the designed-pattern data, e.g., for a semiconductor device, it is required to correct the designed-pattern data with regard to the proximity effect and/or the optical proximity effect. For this purpose, it is required to search the designed-pattern data on the designed patterns which are adjacent to each other and to correct the searched designed-pattern data. Those pieces of information that are required for the proximity effect correction and/or the optical proximity effect correction are the sizes of the designed patterns which are required to be corrected and the space widths between said designed patterns and adjacent designed patterns thereto.
Further, when the designed-pattern data is of stream format, some designed patterns overlap with each other, and some data processing is therefore required. When the designed-pattern data is of EB data format, the designed patterns do not overlap with each other, while pattern fracturing or field partition is present depending upon an electron beam exposure apparatus, and some data processing is therefor required for obtaining the above information. The term xe2x80x9cpattern fracturingxe2x80x9d refers to a state where one designed pattern for forming one mask pattern is fractured into a plurality of designed patterns. Therefore, the following is required. For example, the designed patterns are determined on whether they are in contact with one another, the designed patterns in contact with each other are stored in a memory as a combined designed pattern, and finally, dimensions of the combined designed pattern and a space width between the combined designed pattern and an adjacent designed pattern are determined. The above processing requires the search of the adjacent designed patterns, and when the number of the designed patterns is n, therefore, the processing time suffers an increase of the order of n2 in the worst case.
Otherwise, conventionally, designed-pattern data are bit-mapped with a minimum grid size being used as a unit, which state is schematically shown in FIG. 13A. The contents of first to 12th bitmap data are xe2x80x9c0xe2x80x9d, the contents of 13th to 32nd bitmap data for a designed pattern A are xe2x80x9c1xe2x80x9d, the contents of 33rd to 53rd bitmap data are xe2x80x9c0xe2x80x9d, the contents of 54th to 62nd bitmap data for a designed pattern B are xe2x80x9c1xe2x80x9d, and the contents of 63rd and 64th bitmap data are xe2x80x9c0xe2x80x9d. The dimension of the designed pattern is determined by deducting the bitmap data for coordinate values showing one edge portion of the designed pattern from the bitmap data for coordinate values showing the other edge portion. Further, a space width between one designed pattern and an adjacent designed pattern can be determined by deducting the bitmap data for coordinate values showing one edge portion of one adjacent designed pattern from the bitmap data for coordinate values showing one edge portion of the other designed pattern. When two designed patterns overlap, for example, as schematically shown in FIG. 13B, obtained bitmap data represents one designed pattern. That is, when one edge portion of one designed pattern overlap, or is continued from, one edge portion of the other adjacent designed pattern, these designed patterns can be represented as continuous bitmap data. This bit-mapping method is called xe2x80x9carea-bitmapping methodxe2x80x9d. In the bitmap data obtained by the above area-bitmapping method, the overlapping of the designed patterns is removed, or in the area-bitmapping method, it is no longer necessary to remove the overlapping of the designed patterns.
In the above area-bitmapping method, however, it is required to bit-map all of the designed patterns while using a minimum grid size as a unit, the bitmap data are enormous in volume, and it is required to search the designed patterns with regard to all of the bitmap data. There is therefore a problem that the proximity effect correction and/or the optical proximity effect correction take a long time, and that a memory used is enormous.
It is therefore an object of the present invention to provide a method of correcting designed-pattern data, including a method capable of determining line widths and space widths of designed patterns at a practical speed, for improving the conventional area-bitmapping method and for correcting the designed-pattern data with regard to the proximity effect and/or the optical proximity effect.
It is further another object of the present invention to provide a method of electron beam exposure, a photomask, a method of fabrication of a photomask, a method of optical exposure, a semiconductor device, a method of fabrication of a semiconductor device and an apparatus for correcting designed-pattern data, including the method of correcting designed-pattern data.
For achieving the above object, the method for correcting designed-pattern data obtained by data-processing a plurality of designed patterns, provided by the present invention, comprises the steps of;
(a) producing hierarchical-area-bitmapped bitmap data from a plurality of the designed-pattern data,
(b) determining a line width of the designed pattern and a space width between said designed pattern and a designed pattern adjacent to said designed pattern, from said hierarchical-area-bitmapped bitmap data, and
(c) correcting the designed-pattern data on the basis of the determined line width and the determined space width, for proximity effect correction and/or optical proximity effect correction.
The method of electron beam exposure, provided by the present invention for achieving the above object, comprises the steps of;
correcting designed-pattern data obtained by data-processing a plurality of designed patterns,
preparing pattern data for electron beam exposure from the corrected designed-pattern data, and
exposing an electron beam resist formed on a substrate with an electron beam on the basis of the obtained pattern data for electron beam exposure,
wherein the correction of the designed-pattern data comprises the steps of;
(a) producing hierarchical-area-bitmapped bitmap data from a plurality of the designed-pattern data,
(b) determining a line width of the designed pattern and a space width between said designed pattern and a designed pattern adjacent to said designed pattern, from said hierarchical-area-bitmapped bitmap data, and
(c) correcting the designed-pattern data on the basis of the determined line width and the determined space width, for proximity effect correction and/or optical proximity effect correction.
The method of fabrication of a photomask, provided by the present invention for achieving the above object, comprises the steps of;
correcting designed-pattern data obtained by data-processing a plurality of designed patterns,
preparing pattern data for electron beam exposure from the corrected designed-pattern data,
exposing an electron beam resist formed on a mask blank with an electron beam on the basis of the obtained pattern data for electron beam exposure,
forming an etching mask by developing the electron beam resist, and
etching the mask blank with the etching mask,
wherein the correction of the designed-pattern data comprises the steps of;
(a) producing hierarchical-area-bitmapped bitmap data from a plurality of the designed-pattern data,
(b) determining a line width of the designed pattern and a space width between said designed pattern and a designed pattern adjacent to said designed pattern, from said hierarchical-area-bitmapped bitmap data, and
(c) correcting the designed-pattern data on the basis of the determined line width and the determined space width, for proximity effect correction and/or optical proximity effect correction.
The photomask, provided by the present invention for achieving the above object, is a photomask obtained by the fabricating steps of;
correcting designed-pattern data obtained by data-processing a plurality of designed patterns,
preparing pattern data for electron beam exposure from the corrected designed-pattern data,
exposing an electron beam resist formed on a mask blank with an electron beam on the basis of the obtained pattern data for electron beam exposure,
forming an etching mask by developing the electron beam resist, and
etching the mask blank with the etching mask,
wherein the correction of the designed-pattern data comprises the steps of;
(a) producing hierarchical-area-bitmapped bitmap data from a plurality of the designed-pattern data,
(b) determining a line width of the designed pattern and a space width between said designed pattern and a designed pattern adjacent to said designed pattern, from said hierarchical-area-bitmapped bitmap data, and
(c) correcting the designed-pattern data on the basis of the determined line width and the determined space width, for proximity effect correction and/or optical proximity effect correction.
The method of optical exposure, provided by the present invention for achieving the above object, comprises the step of exposing a photo resist formed on a substrate through a photomask with exposure light to transfer a pattern formed in the photomask to the photo resist formed on the substrate,
said photomask obtained by the fabricating steps of;
correcting designed-pattern data obtained by data-processing a plurality of designed patterns,
preparing pattern data for electron beam exposure from the corrected designed-pattern data,
exposing an electron beam resist formed on a mask blank with an electron beam on the basis of the obtained pattern data for electron beam exposure,
forming an etching mask by developing the electron beam resist, and
etching the mask blank with the etching mask,
wherein the correction of the designed-pattern data comprises the steps of;
(a) producing hierarchical-area-bitmapped bitmap data from a plurality of the designed-pattern data,
(b) determining a line width of the designed pattern and a space width between said designed pattern and a designed pattern adjacent to said designed pattern, from said hierarchical-area-bitmapped bitmap data, and
(c) correcting the designed-pattern data on the basis of the determined line width and the determined space width, for proximity effect correction and/or optical proximity effect correction.
The method of fabricating a semiconductor device, provided by the present invention for achieving the above object, comprises the steps of (1) exposing a photo resist formed on a substrate through a photomask with exposure light to transfer a pattern formed in the photomask to the photo resist formed on the substrate, (2) developing the photo resist to obtain an etching mask, and (3) etching the substrate with the etching mask,
said photomask obtained by the fabricating steps of;
correcting designed-pattern data obtained by data-processing a plurality of designed patterns,
preparing pattern data for electron beam exposure from the corrected designed-pattern data,
exposing an electron beam resist formed on a mask blank with an electron beam on the basis of the obtained pattern data for electron beam exposure,
forming an etching mask by developing the electron beam resist, and
etching the mask blank with the etching mask,
wherein the correction of the designed-pattern data comprises the steps of;
(a) producing hierarchical-area-bitmapped bitmap data from a plurality of the designed-pattern data,
(b) determining a line width of the designed pattern and a space width between said designed pattern and a designed pattern adjacent to said designed pattern, from said hierarchical-area-bitmapped bitmap data, and
(c) correcting the designed-pattern data on the basis of the determined line width and the determined space width, for proximity effect correction and/or optical proximity effect correction.
The semiconductor device, provided by the present invention for achieving the above object, is a semiconductor device obtained by the fabricating steps of (1) exposing a photo resist formed on a substrate through a photomask with exposure light to transfer a pattern formed in the photomask to the photo resist formed on the substrate, (2) developing the photo resist to obtain an etching mask, and (3) etching the substrate with the etching mask,
said photomask obtained by the fabricating steps of;
correcting designed-pattern data obtained by data-processing a plurality of designed patterns,
preparing pattern data for electron beam exposure from the corrected designed-pattern data,
exposing an electron beam resist formed on a mask blank with an electron beam on the basis of the obtained pattern data for electron beam exposure,
forming an etching mask by developing the electron beam resist, and
etching the mask blank with the etching mask,
wherein the correction of the designed-pattern data comprises the steps of;
(a) producing hierarchical-area-bitmapped bitmap data from a plurality of the designed-pattern data,
(b) determining a line width of the designed pattern and a space width between said designed pattern and a designed pattern adjacent to said designed pattern, from said hierarchical-area-bitmapped bitmap data, and
(c) correcting the designed-pattern data on the basis of the determined line width and the determined space width, for proximity effect correction and/or optical proximity effect correction.
The designed-pattern data is corrected with regard to the proximity effect, with regard to the optical proximity effect or with regard to the proximity effect and the optical proximity effect.
The substrate used in the method of electron beam exposure according to the present invention includes, for example, a mask blank obtained by forming a light-shielding thin layer or light semi-shielding thin layer of metal or metal oxide (the thin layer may have a single-layered structure or a multi-layered structure) on a glass substrate transparent to the exposure light, such as soda-lime glass, low-expansion glass or synthetic quartz glass.
In the method of electron beam exposure, the method of optical exposure, the semiconductor device or the method of fabrication of the semiconductor device, provided by the present invention, the substrate includes a semiconductor substrate, a semi-insulated or insulated substrate, or a layer which is formed on any one of these substrates and is to be treated. The layer to be treated specifically includes a polysilicon layer doped with an impurity; a layer of metal such as aluminum alloy, tungsten, copper or silver; a layer of metal compound such as tungsten silicide or titanium silicide; a stacked structure layer formed of a polysilicon layer doped with an impurity and a layer of metal compound such as tungsten silicide or titanium silicide; a stacked structure layer formed of a polysilicon layer doped with an impurity, a layer of metal compound such as tungsten silicide or titanium silicide and an insulation layer; and an insulation layer. The above insulation layer refers to an insulation layer formed of a known insulation material such as SiO2, BPSG, PSG, BSG, AsSG, SbSG, NSG, SOG, LTO (lower temperature oxide, low temperature CVD-SiO2), SiN or SiON, or a stacked structure layer formed of any two or more materials of these.
The photomask provided by the present invention, the photomask fabricated by the method of fabrication of the photomask provided by the present invention, the photomask used in the method of optical exposure provided by the present invention, the photomask used in fabricating the semiconductor device provided by the present invention, or the photomask used in the method of fabrication of the semiconductor device provided by the present invention, includes a general exposure mask in which patterns of a light-shielding thin layer are formed, a phase shift mask, and a half tone method phase shift mask in which patterns of a light semi-shielding thin layer are formed.
In the method of optical exposure, the semiconductor device or the method of fabrication thereof, provided by the present invention, the photomask for use with exposure light may be a photomask prepared by etching the mask blank with the etching mask obtained by developing the electron beam resist (i.e., master mask), or it may be a working mask prepared by copying the master mask.
In the method of correcting designed-pattern data, the method of electron beam exposure, the photomask, the method of fabrication of the photomask, the method of optical exposure, the semiconductor device or the method of fabrication of the semiconductor device, provided by the present invention, the hierarchical-area-bitmapping procedure in the above step (a) may include;
(A) bitmapping the designed-pattern data concerning a predetermined area including the deigned pattern, on the basis of a first grid size, to produce a bitmap data on a first grid size level, and
(B) producing bitmap data on an (m+1)-th grid size level from a bitmap data on an m-th grid size level which includes an edge of the designed pattern and is included among a plurality of bitmap data obtained on the basis of an m-th grid size, where m=1, 2, 3 . . . M, M is a minimum grid size representing coordinate value, and an (m+1)-th grid size is smaller than an m-th grid size, and
repeating the step (B) by incrementing m by 1 until the bitmap data obtained on the basis of the (m+1)-th grid size represents the coordinate value expressing the edge of the designed pattern.
When the bitmap data obtained on the basis of the m-th grid size represents the coordinate value expressing the edge of the designed pattern, it is no longer necessary to produce bitmap data on the basis of the (m+1)-th grid size. For the procedure of hierarchical-area-bitmapping itself, please refer to xe2x80x9cLayout Design and Verificationxe2x80x9d, T. Otsuki, et al., North Holland (1986), pp. 250-251.
The apparatus for correcting designed-pattern data obtained by data-processing a plurality of designed patterns, provided by the present invention for achieving the above object, comprises;
(1) inputting means for inputting the designed-pattern data,
(2) producing means for producing bitmap data,
(3) determining means for determining a line width of the designed pattern and a space width between said designed pattern and a designed pattern adjacent to said designed pattern,
(4) correcting means for correcting the designed-pattern data, and
(5) outputting means for outputting the corrected designed-pattern data,
wherein said producing means is for producing hierarchical-area-bitmapped bitmap data from the designed-pattern data,
said determining means is for determining a line width of the designed pattern and a space width between the designed pattern and a designed pattern adjacent to said designed pattern on the basis of said hierarchical-area-bitmapped bitmap data, and
said correcting means is for correcting the designed-pattern data on the basis of the determined line width and the determined space width, for proximity effect correction and/or optical proximity effect correction.
In the apparatus for correcting designed-pattern data, provided by the present invention, preferably, said producing means is preferably for;
(A) bitmapping the designed-pattern data concerning a predetermined area including the deigned pattern, on the basis of a first grid size, to produce a bitmap data on a first grid size level, and
(B) producing bitmap data on an (m+1)-th grid size level from a bitmap data on an m-th grid size level which includes an edge of the designed pattern and is included among a plurality of bitmap data obtained on the basis of an m-th grid size, where m=1, 2, 3 . . . M, M is a minimum grid size representing coordinate value, and an (m+1)-th grid size is smaller than an m-th grid size, and
repeating the step (B) by incrementing m by 1 until the bitmap data obtained on the basis of the (m+1)-th grid size represents the coordinate value expressing the edge of the designed pattern.
When the bitmap data obtained on the basis of the m-th grid size represents the coordinate value expressing the edge of the designed pattern, it is no longer necessary to produce bitmap data on the basis of the (m+1)-th grid size.
In the present invention, when the designed patterns of a semiconductor device are searched for one chip as a whole, the hierarchical-area-bitmapped bitmap data are produced from the designed-pattern data, and the hierarchical-area-bitmapped bitmap data are used for determining the line widths and the space widths of the designed patterns. Even when a stream format is used as designed-pattern data, therefore, it is no longer necessary to check whether or not the designed patterns overlap or are in contact. On the other hand, when EB data format is used, pattern fracturing or field partition is present. However, by producing the hierarchical-area-bitmapped bitmap data from the designed-pattern data, it is no longer necessary to consider the pattern fracturing or the field partition. Further, unlike prior art methods, it is no longer necessary to produce bitmap data from all of the designed patterns on the basis of the minimum grid size, and the file size (data volume) of the bitmap data is decreased by the hierarchical-area-bitmapping. As a consequence, the designed patterns for one chip as a whole can be searched at a practical speed to determine the line widths and the space widths of the designed patterns.